A Guide to the Motorola HC11 VHDL model
The Motorola HC11 VHDL model is an extensive design example of behavioral VHDL.
The design consists of many files that are in the examples subdirectory of the
compiler installation directory. A detailed explaination of the SPI subsystem
of the HC11 model is available on-line.
* NOTE This model is an alpha version, and should be considered a work
in progress.
The following is an outline of the files that constitute the VHDL model of the
HC11 microcontroller.
- hc11io.vhd -- general TEXTIO facilities
- hc11type.vhd -- common user defined types
- hc11clk.vhd -- HC11 internal clocks
- hc11cfg.vhd -- HC11 configuration registers logic
- hc11mem.vhd -- on-chip EPROM
- hc11ram.vhd -- on-chip RAM
- hc11spi.vhd -- HC11 Synchronous Peripheral Interface
- hc11sci.vhd -- HC11 Asynchronous Serial Communication Interface
- hc11port.vhd -- HC11 parallel port I/O interface
- hc11time.vhd -- Main timer and pulse accumulator
- hc11intr.vhd -- CPU interrupt control
- hc11inst.vhd -- CPU op codes constants
- hc11cpu.vhd -- on-chip CPU
- hc11.vhd -- partial HC11 system (no pin logic)
To compile the model, these files should be compiled in the order they
appear. After compiling all of these files, you may create a simulatable
executable model with the command:
link hc11 hc11 hc11
If you have a make utility, a makefile is also included in the
examples subdirectory. The hc11.vhd file contains the top level entity for
this version of the design (no pin logic). Please read the comments in this
file to see how the system should be simulated. Additionally, reading the
comments at the top of each of these files will help familarize you with
the design.
The following supplemental files are provided for use with the HC11 model.
- scir.env,
- scirtest.vhd,
- scit.env,
- scittest.vhd -- test benches for the SCI subsystem
- timeintr.vhd -- a test bench for the main timer and interrupt subsystems
- spitest.vhd,
- spit.env -- a test bench for the SPI subsystem
- memtest.vhd,
- memtest.s19 -- a test bench for the on-chip EPROM
- true.wav,
- dbg*.env -- configuration files to use with hc11.vhd
- true.wav,
- hc11rst.wav,
- hexout.asm,
- hexout.lst,
- hexout.s19 -- a sample HC11 program for hc11.vhd
- true.wav,
- serial.env
- serial.asm,
- serial.lst,
- serial.s19 -- An example program that transmits a character with
the SPI and SCI subsytems.
- makefile -- makefile to use with a make utility
The scirtest.vhd, scittest.vhd, timeintr.vhd, spitest.vhd, and memtest.vhd
files contain comments that describe their purpose and how the other auxillary
files are used with them.
Please send comments, suggestions, and questions concerning this model to:
Green Mountain Computing Systems
2 Joseph Lane
Essex Junction, VT 05452
e-mail: thibault@together.net