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Overview

A compiler is actually the main program in a set of programs that allows the user to convert a program written in a human-readable language into machine language that the computer can interpret. VHDL is a language specifically developed as a simulation language for digital design. VHDL stands for VHSIC Hardware Description Language and VHSIC stands for Very High Speed Integrated Circuits. VHDL is an IEEE standard and this compiler is based on the IEEE Std 1076-1993, IEEE Standard VHDL Language Reference Manual.

The compilation process (generating a machine language program from your program) is typically divided into three successive tasks. Each of these tasks is usually performed by a separate program. This first task is performed by the compiler and translates your program into an intermediate language that is easier to translate to machine language. The compiler also checks the validity of the program as it translates it. A program is valid only if it meets the specifications of the language. The output from the compiler is then used as input for the next task. The output from the compiler is called an object or library file.

The next task is performed by a program called the linker. The linker is responsible for "linking'' or combining one or more object files together and generating a machine language program. GM VHDL allows the designer to partition his/her design into multiple files called modules. Each module is compiled into a separate object file. The linker then combines the object files from all the modules that make up the design. The output from the linker is an executable file.

The last task is to load the executable file into memory for execution. The loader performs this task. In Linux there is a built-in loader that loads and executes programs that are typed at the prompt. Since GM VHDL requires a kernel to be present to coordinate execution, a GM VHDL executable has to be run with a special loader that has the kernel built into it. The next chapter describes how to use the particular programs included in the Green Mountain VHDL package to compile a design.