Research Interests

Design reuse is essential for dealing with complex integrated circuits and printed circuit boards. A hardware description language such as VHDL can be used to affect this kind of reuse. Verifying a VHDL design is similar to testing a conventional software program. When verifying a VHDL design, the focus is on errors in the VHDL, not in the fabrication process to come. When testing software, the focus is on errors in the code, not in the compiler. In both cases the main source of problems is coding errors. This similarity suggests that techniques that have been successfully used to test software may also be effective when applied to the verification of VHDL designs. The similarity is further underlined by the trend to build hardware models from VHDL source code libraries much like one would build a software program from C++ class libraries. Dr. Walsh's plan to focus on tools and techniques used to test software components. The goal of his research is to facilitate the timely development and maintenance of high-quality designs in VHDL.

A second area of research interest is object oriented software engineering. Object oriented software system are constructed using standardized components in a manner analogous to the construction of hardware systems. These components are contained in class libraries. A number of class libraries have been developed and are available for sale. Class library components should be well defined and documented, portable and carefully tested. However, there is no accepted practice for testing or benchmarking these components. The objective of this work is to develop a test-bench to facilitate behavioural testing and performance evaluation of class library components.

Selected Publications

On the Benefits of Integrating Systematic Verification into CS1 and CS@ (postscript version) (with Jim Uhl), The First Annual Consortium for Computing in Small Colleges Northwest Conference, Spokane, Washington, 1999.

Integrating VHDL into a First Course in Logic Design 1999 Canadian Conference on Electrical and Computer Engineering, Edmonton, Alberts, Canada. May 1999.

Teaching Programming With Minimal Examples (with D. Hoffman), Western Canadian Conference on Computer Education, Nanaimo, B.C. Canada. May 1997.

Engineering Business Computing Systems: A Position Paper (postscript version) (converted html version) (with D. Cochrane, W. Hohman, D Roelants), Western Canadian Conference on Computer Education, Nanaimo, B.C. Canada. May 1997.

CAD for Verification Testing (with D. Hoffman), 1997 Canadian Conference on Electrical and Computer Engineering, St., John's, Newfoundland, Canada. May 1997.

Automated Behavioral Testing of VHDL Components (with D. Hoffman), 1996 Canadian Conference on Electrical and Computer Engineering, Calgary, Alberta, Canada. May 26th 1996.

Teaching Software Design and Maintenance: A Document-Driven Approach (with D. Hoffman, P. Strooper), Western Canadian Conference on Computer Education, Prince George, B.C. Canada. May 2nd 1996.

Teaching and Testing (with D. Hoffman, P. Strooper), Conference on Software Engineering Education, Software Engineering Institute, Daytona Beach, Florida, USA. April, 1996.

Hardware Techniques for Testing Software Components (with D. Hoffman), IEEE Pacific Rim Conference on Communications, Computers, Visualization, and Signal Processing, Victoria, B.C. Canada. May 1995.

Goal Directed Simulated Annealing and Simulated Sintering (with DM Miller), Microelectronics Journal, Elsevier Science Publishers Ltd, pp 363-382, Vol 25, No 5 August, 94.