The block-diagram characteristics of an electronic component are defined in VHDL entity declarations. VHDL architecture declarations define component behaviour. The goal of behavioural testing is to establish that a component exhibits certain required behaviour. To this end, test cases are applied to the component and the observed behaviour is checked against the required behaviour.
Debuggers and interactive drivers are used to interactively test the behaviour of VHDL components. For non-interactive testing, the current practice is to develop a testing sub-system known as a testbench. A testbench consists of an implementation of the component under test (CUT), a driver component, and fully functional implementations of any other components that interact with the CUT. The testbench driver is used to exercise the sub-system. Its job is to apply test cases to the CUT and report any deviations in actual behaviour from expected behaviour.
From the tester's perspective, the ideal is to completely isolate the CUT and exercise it using the driver. The testbench approach described above is less than ideal since it may contain components other than the driver and the CUT. The presence of these extra components in the testbench is undesirable since they may adversely effect test controllability and observability.
Two types of driver are common: one is algorithmic and the other reads test vectors from an external file [4]. Drivers are usually hand-coded even though a significant proportion of the code is boiler-plate in nature. Drivers that read test vectors from an external file are expensive to maintain. Often, when a design component evolves and is reused, its testbench must be re-developed from scratch.