CSCI 355 --- Fall 2023

Lab 6

This lab has deliverables to be submitted and marked.

Due date: noon, 31 October 2023, Tuesday

Problem Description:

There are two tasks in this lab.

First, augment a 4-bit binary Full Adder IC (SN7483, 16-pin chip) to make a 4-bit Adder/Subtractor, assuming that 2's complement is used for negative numbers.

Second, augment the 4-bit Adder/Subtractor (especially the subtractor functionality) you just made to make a Magnitude Comparator for two 3-bit binary numbers. That is, you can safely assume that the data to be compared are guaranteed to be positive (the extra most significant bit of the two 4-bit data used are guaranteed to be 0).

Pre-lab Preparation:

1. Read the data sheets of IC 7483 (4-bit binary full adder), 7486 (quad 2-input XOR gate), and other ICs you'll use in this task, get familiar with their pin information. (Deliverable: pin information table for the IC 7483.)
2. Draw the logic schematic of a 4-bit binary adder/subtractor using a 4-bit binary full adder, assuming that 2's complement encoding is used for binary numbers. (Deliverable: logic schematic; where only the interface of the binary adder (instead of the actual schematic) should be shown.)
3. For each chip used in your circuit to realize the logic schematic developed in the previous step for the adder/subtractor, provide a complete pin-out table. (Deliverable: complete pin-out tables for each chip used in your circuit.)
4. Draw the logic schematic of the 3-bit magnitude comparator using the 4-bit binary adder/subtractor you built before. (Deliverable: logic schematic; for the adder/subtractor used in the circuit, you can either show only its interface, or its schematic developped in the step before.)
5. For each chip used in your circuit to realize the logic schematic developed in the previous step for the comparator, provide a complete pin-out table. (The pin out tables of the chips used in the subtractor could be copy/pasted from the task of adder/subtractor. But the redundancy is necessary to make this task independent from the previous task.) (Deliverable: complete pin-out tables for each chip used in your circuit.)

In-Lab Tasks:

1. Present your pre-lab preparation to the instructor;
2. If your preparation is approved, wire your circuit based on your pin-out sheets;
3. Test your circuit with some different combinations of inputs; observe and record the output of your circuit; (Deliverable: For each task, some well designed test cases, their expected outputs and observed outputs.)
4. Demonstrate each of your circuits to your instructor if it has the correct behaviour and sign off each task.

(Optionally) take pictures of your circuits and integrate the pictures in your lab report.

The pre-lab preparation and the in-lab tasks can and should be done by a group of up to 2 students.

What to submit (Deliverables):

Lab report (a text or PDF file) that includes all the deliverables except the physically wired circuits, and any accompanying files.

Please clearly identify your tables, diagrams and pictures with meaningful titles.

How to submit:

You have two ways to submit:

Submit your lab report (.txt, or .pdf) and pictures (.png files) if any on any of the cub machines using the following script:
~liuh/bin/submit 355 Lab6 .

Alternatively, upload your report (and picture if any) to VIU Learn, under CSCI 355's assessment/assignment/Lab 6 tab.